The present invention relates to the lighting arts. It is especially relates to flip chip light emitting diodes for indicator lights, illumination applications, and the like, and will be described with particular reference thereto. However, the invention will also find application in conjunction with other applications that can advantageously employ surface-mount light emitting diodes.
The flip chip light emitting diode configuration has substantial benefits, including reduced light losses due to shadowing by the electrodes, improved thermal coupling of the active layers with the mount, improved current spreading across the device through the use of larger distributed electrodes, reduction in electrical wiring or wire bonding, and compatibility of the flip chip mounting technique with automated die bonding equipment. Group III-nitride-based light emitting diodes on sapphire or silicon carbide substrates have light-transmissive substrates that are compatible with flip chip bonding. In certain material systems in which the preferred epitaxy substrate is opaque or has poor light extraction properties, the substrate may be thinned, or the epitaxial layers may be transferred to a transparent host substrate after formation.
A problem arises, however, because existing automated device attachment tools typically have tolerances that are too large to reliably flip chip bond light emitting diodes. The electrodes of flip chip light emitting diodes have finely spaced features and structures to optimize current spreading and backside reflection. For example, in an exemplary p-on-n configuration, n-type electrode fingers are arranged in close proximity to p-type mesas to promote lateral current spreading. The n-type electrode fingers are preferably laterally spaced apart by about 0.20 mm to 0.25 mm, with p-type electrode material disposed therebetween. Larger lateral spacings result in increased resistive electrical losses and heating. These fine electrode features impose a tight tolerance on the precision and accuracy of the flip-chip bonding of no larger than about 0.15 mm. Placement errors of greater than about 0.15 mm can result in cross-bonding p-type regions to n-type bonding bumps and vice versa. Similarly stringent tolerance limits are imposed on n-on-p configurations. It is typically difficult or impossible to achieve such tight bonding tolerances in automated die attachment of the flip chip light emitting diode directly to a printed circuit board or other relatively large electrical component. Additionally the fine features on the LED cannot be duplicated in existing printed circuit boards due to limitations in the lithography and transfer processes currently in use.
To accommodate the fine electrode features, a sub-mount is commonly arranged between the light emitting diode and the printed circuit board. The light emitting diode is flip chip bonded to the sub-mount, which is of similar size as the light emitting diode so that precise alignment during die attachment is readily achievable. The sub-mount has a first set of bonding pads for the flip chip bonding, and a second set of more widely spaced-apart electrodes or bonding pads for electrically connecting with the printed circuit board. The sub-mount with the light emitting diode flip chip bonded thereto can be attached to the printed circuit board by a surface-mount technique or by wire-bonding.
Use of a sub-mount, although heretofore generally employed to accommodate tight flip chip bonding tolerances, has substantial disadvantages, including introduction of additional packaging processing that increases manufacturing time and cost. The sub-mount also introduces additional thermal resistance which limits heat sinking efficiency. Mechanical reliability can be compromised by the intervening sub-mount. The sub-mount material usually is selected to be both thermally conductive for heat sinking and electrically insulating to provide electrode isolation. If an electrically conductive sub-mount is used, dielectric layers are applied for electrical isolation. If these layers are too thin, they can capacitively limit switching for in high speed applications. Another consideration is matching thermal expansion coefficients at interfaces between the light emitting diode, the sub-mount, and the printed circuit board.
The present invention contemplates an improved apparatus and method that overcomes the above-mentioned limitations and others.